1. Field
The disclosure relates generally to an improved data processing system, and more specifically to a computer implemented method, data processing system, and computer program product for optimizing system performance using spare processing cores in a virtualized environment.
2. Description of the Related Art
Multi-core microprocessor chips comprise a plurality of independent digital signal processor cores on one single integrated circuit chip package. The provision of multiple individual instruction processing cores enables higher computation capacity relative to single processor chip structures. Computer systems incorporating multi-core microprocessor chips usually consume less power and have a lower cost and higher reliability than alternative multi-chip systems, as well as provide assembly cost advantages by requiring fewer physical system components. With the ability to have large numbers of processors in a single chip, even low end computing systems are beginning to contain 16, 32, or 64 processors.
A Non-uniform Memory Access (NUMA) architecture is typically used by vendors to provide scalability when building servers with large numbers of processors. A NUMA architecture is a computer memory design connecting multiple clusters of processor chips in which some regions of memory are on physically different busses from other regions. Under NUMA, the length of memory access time depends on the memory location relative to a processor, such that the processor can access its own local memory faster than non-local (remote) memory (i.e., memory local to another processor or memory shared between processors). Consequently, the process of selecting processors and memory resources to consolidate workloads becomes important to achieve optimum system performance. In general performance terms, a system is being optimally used if all of the system's processor cycles are in use (i.e., maximum system utilization). However, when processor cycles are being spent on data access latency when accessing remote memory rather than being used to complete instructions, the processor cycles lost to access latency are referred to as MIPS (million instructions per second) loss. The number of MIPS is a general measure of computing performance and, by implication, the amount of work a larger computer can do. In a virtualized environment, MIPS loss can result when the system is pushed to its maximum utilization under some circumstances. In addition, virtual processors may be allocated in excess of the number of physical processors, which is known as a processor overcommit configuration. In such a configuration, the physical processors are time sliced across multiple virtual processors.